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ICS512 LOCOTM PLL Clock Multiplier
Description
The ICS512 LOCOTM is the most cost effective way to generate a high quality, high frequency clock output and a reference clock from a lower frequency crystal or clock input. The name LOCO stands for LOw Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. With a reference output, this chip plus an inexpensive crystal can replace two oscillators. Stored in the chip's ROM is the ability to generate nine different popular multiplication factors, allowing one chip to output many common frequencies (see page 2).
Features
* Packaged as 8 pin SOIC or die * Upgrade of popular ICS502 with: - changed multiplier table - higher operating frequencies * Zero ppm multiplication error * Easy to cascade with other 5xx series * Input crystal frequency of 5 - 27 MHz * Input clock frequency of 2 - 50 MHz * Output clock frequencies up to 200 MHz * Compatible with all popular CPUs * Duty cycle of 45/55 up to 200 MHz * Mask option for 9 selectable frequencies * Operating voltages of 3.0 to 5.5V * Industrial temperature version available * Advanced, low power CMOS process
Block Diagram
VDD GND
S1, S0
2 PLL Clock Synthesis and Control Circuitry
Output Buffer
CLK
Crystal or clock input
X1/ICLK
Crystal Oscillator
X2
Output Buffer
REF
Optional crystal capacitors 1 Revision 061900 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com
MDS 512 C
ICS512 LOCOTM PLL Clock Multiplier
Pin Assignment
X1/ICLK VDD GND REF 1 2 3 4 8 7 6 5 X2 S1 S0 CLK
Clock Output Table
S1 0 0 0 M M M 1 1 1 S0 0 M 1 0 M 1 0 M 1 CLK 4X input 5.333X input 5X input 2.5X input 2X input 3.333X input 6X input 3X input 8X input
0 = connect directly to ground. 1 = connect directly to VDD. M = leave unconnected (floating).
Common Output Frequencies Examples (MHz)
Output Input Selection (S1, S0) Output Input Selection (S1, S0) 20 10 M, M 66.66 20 M, 1 24 12 M, M 72 12 1, 0 30 10 1, M 75 25 1, M 32 16 M, M 80 10 1, 1 33.33 16.66 M, M 83.33 25 M, 1 37.5 15 M, 0 90 15 1, 0 40 10 0, 0 100 20 0, 1 48 12 0, 0 120 15 1, 1 50 20 M, 0 125 25 0, 1 60 10 1, 0 133.33 25 0, M 64 16 0, 0 150 25 1, 0
Note that all of the above outputs are achieved by using a common, inexpensive 10MHz to 25MHz crystal. Consult ICS on how to achieve other output frequencies.
Pin Descriptions
Number 1 2 3 4 5 6 7 8 Name X1/ICLK VDD GND REF CLK S0 S1 X2 Type XI P P O O TI TI XO Description Crystal connection or clock input. Connect to +3.3V or +5V. Connect to ground. Buffered crystal oscillator output clock. Clock output per Table above. Multiplier select pin 0. Connect to GND or VDD or float (no connection). Multiplier select pin 1. Connect to GND or VDD or float (no connection). Crystal connection. Leave unconnected for clock input.
Key: XI/XO = crystal connections, TI = tri-level input, O = output, P = power supply connection
2 Revision 061900 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com
MDS 512 C
ICS512 LOCOTM PLL Clock Multiplier
Electrical Specifications
Parameter Conditions Minimum Typical ABSOLUTE MAXIMUM RATINGS (stresses be ond these can permanentl damage the device) e e Supply Voltage, VDD Referenced to GND Inputs Referenced to GND -0.5 Clock Output Referenced to GND -0.5 Ambient Operating Temperature 0 ICS512MI only -40 Soldering Temperature Max of 10 seconds Storage temperature -65 DC CHARACTERISTICS (VDD = 3.3V unless otherwise noted) Operating Voltage, VDD 3 Input High Voltage, VIH, ICLK only ICLK (Pin 1) (VDD/2)+1 VDD/2 Input Low Voltage, VIL, ICLK only ICLK (Pin 1) VDD/2 Input High Voltage, VIH S0, S1 VDD-0.5 Input Low Voltage, VIL S0, S1 Output High Voltage, VOH, CMOS high IOH=-8mA VDD-0.4 Output High Voltage, VOH IOH=-12mA 2.4 Output Low Voltage, VOL IOL=12mA IDD Operating Supply Current, 20 MHz crystal No Load, 100MHz 9 Short Circuit Current CLK output 70 Input Capacitance, S1, S0 Pins 6, 7 4 AC CHARACTERISTICS (VDD = 3.3V unless otherwise noted) Input Frequency, crystal input 5 Input Frequency, clock input 2 Output Frequency, VDD = 4.5 to 5.5V 0 to +70 C 14 Note 1 -40 to +85 C 14 Output Frequency, VDD = 3.0 to 3.6V 0 to +70 C 14 Note 1 -40 to +85 C 14 Output Clock Rise Time 0.8 to 2.0V 1 Output Clock Fall Time 2.0 to 0.8V 1 Output Clock Duty Cycle at VDD/2 45 49 to 51 Absolute Clock Period Jitter Deviation from mean 200 One Sigma Clock Period Jitter 80 Maximum 7 VDD+0.5 VDD+0.5 70 85 260 150 5.5 (VDD/2)-1 0.5 Units V V V C C C C V V V V V V V V mA mA pF MHz MHz MHz MHz MHz MHz ns ns % ps ps
0.4
27 50 200 160 160 145
55
Note 1: The phase relationship between input and output clocks can change at power up. For a fixed phase relationship, see the ICS570 or the ICS527.
3 Revision 061900 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com
MDS 512 C
ICS512 LOCOTM PLL Clock Multiplier
External Components / Crystal Selection
The ICS512 requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS512 to minimize lead inductance. No external power supply filtering is required for this device. A 33 terminating resistor can be used next to the CLK and REF pins. The total on-chip capacitance is approximately 15 pF, so a parallel resonant, fundamental mode crystal should be used. For crystals with a specified load capacitance greater than 15 pF, crystal capacitors should be connected from each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be = (CL-15)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either).
Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC 95.) 8 pin SOIC
Symbol A
A1
E
INDEX AREA
H
B
C
1
2
D A1 e Ordering Information
Part/Order Number ICS512M ICS512MT ICS512MI ICS512MIT Marking ICS512M ICS512M ICS512I ICS512I
h x 45 A L
D E e H h L
Inches h Min Max 0.0532 0.0688 0.0040 0.0098 0.0130 0.0200 0.0075 0.0098 0.1890 0.1968 0.1497 0.1574 .050 BSC S 0.2284 0.2440 0.0099 0.0195 0.0160 0.0500
Millimeters m Min Max 1.35 1.75 0.10 0.24 0.33 0.51 0.19 0.24 4.80 5.00 3.80 4.00 1.27 BSC S 5.80 6.20 0.25 0.50 0.41 1.27
B
C
Package 8 pin SOIC 8 pin SOIC on tape and reel 8 pin SOIC 8 pin SOIC on tape and reel
Temperature 0 to 70 C 0 to 70 C -40 to +85 C -40 to +85 C
While the information presented herein has been checked for both accuracy and reliability, ICS assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
LOCO is a trademark of ICS
4 Revision 061900 Printed 11/13/00 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800tel * www.icst.com
MDS 512 C

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